NFC Design Review and Testing
Marine
by Rod Macpherson
The client asked us to carry out a PCB design review of their NFC modules, followed by antenna measurements on the PCB. In this article, we demonstrate the details of this work without compromising the client’s design information.
The system consists of a key fob and an antenna reader. We will first look at the key fob.
The key fob uses a chip with a built-in tuning capacitance Cs of 50 pF (47.5–52.5 pF). It is tuned with a 22 pF C0G capacitor on the board. The PCB thickness is measured to be 0.41 mm.
Figure 1 shows the equivalent circuit.
Rchip: not specified
Ctun=50 pF (otherwise referred to as Cs)
Parasitic connection impedances R1con, R2con, and Ccon are negligible and therefore ignored
The designer’s task would have been to create an optimum PCB antenna loop using empirical formulas, trial and error, or simulation.
Optimum tuning is specified in the chip application note at 13.56 MHz, although LANT is not given. However, the optimum antenna inductance can be easily calculated from:
LANT=1ω02⋅Cs, ω0=2πF0 LANT=ω02⋅Cs, ω0=2πF0
The result is 2.76 µH at F0=13.56 MHz for Cs=50 pF
.
A Vector Network Analyser (VNA) S11 Smith chart impedance plot is used to measure the antenna parameters, as per application note (note: IC not fitted on the measured sample).
Power = 0 dBm, with a -3 dB pad at the coax end to reduce VSWR effects.
Port extension of 150 ps applied to correct for the length of the flexible semi-rigid cable (and jack-to-jack adapter, which was not included in the calibration).
Antenna parallel impedance model is then therefore obtained
Antenna Parallel Impedance Model
Antenna inductance LANT=1.70 μHLANT=1.70μH
Antenna capacitance CANT=4.87 pFCANT=4.87pF
Parallel self-resonant frequency FPRES=55.3 MHzFPRES=55.3MHz
Resistance RANT=12.1 kΩRANT=12.1kΩ
Working frequency FWORK=13.56 MHzFWORK=13.56MHz
The maximum Q available for this antenna is 84, which is rather high and would ideally be reduced to around 20.
Loaded circuit resonant frequency and Q can be checked by using a sniffer coil to couple to the Key Fob with the IC loading the antenna.
The resonant frequency of the fob is too high at 14.396 MHz.
Bandwidth is (14.483−14.315) MHz=168 kHz(14.483−14.315)MHz=168kHz.
Q=14.3960.168=85.7Q=0.16814.396=85.7 (which agrees with the previous estimate)
The key fob antenna has been characterised:
Inductance is 1.7 µH (lower than the ideal value of 2.76 µH)
Capacitance is 4.87 pF
The plastic moulding and magnets have a small effect on the tuning of the antenna
Consequently, the design employs an additional 22 pF external (to the IC) tuning capacitor.
If this circuit were to be potted, it would likely be closer to the correct frequency of 13.56 MHz, as the antenna parasitic capacitance would increase.
The key reader may also introduce additional loading.
However, the Q of 85.7 is rather high, because the additional external capacitance is >50% of the IC capacitance, which may cause performance degradation due to reduced bandwidth.
A deviation of 30% may be problematic, as noted in the application notes
ST recommends a Q of approximately 25 for 106 kbps NFC applications (see T5S2_Toronto_Design_NFC_Reader_D. Merino)
The tuning, and hence the datalink eye pattern performance, may also be overly sensitive to manufacturing tolerances as a result of the high Q.
It is beyond the scope of this RF tuning study to investigate the datalink eye patterns, but it is suggested that this is checked if the facility is available.
It could be that, in this application, reduced range performance is acceptable, as a key with too large a working range may not be desirable.
The reader assembly comprises an antenna board, similar to that of the key fob, and a reader PCB, which are connected via plug-and-socket connectors.
The reader antenna board appears to be very similar, if not identical, to the loop pattern of the key fob antenna. However, the board thickness is significantly different:
Key fob antenna board: t=0.41 mm (probable target was 0.5 mm)
Reader antenna board: t=1.49 mm (probable target was 1.6 mm)
The parasitic capacitance of the reader antenna will therefore be lower, and its self-resonant frequency (SRF) is likely to be higher.
The reader board is based on the ST25R3911B and hosts an antenna matching circuit, with headers into which the antenna board is plugged.
It was discovered that the reader PCB matching circuit seems to be a copy of the dev board values with modified damping resistors and tuning capactiance. The schematic of the dev board is shown below
The reader antenna impedance (with and without the housing) was measured on the vector network analyser (S11 Smith Chart Impedance Plot) with the same settings as for the key fob.
The reader antenna has been characterised:
Inductance is 1.6 µH (very similar to the key fob)
Capacitance is 4.43 pF (slightly less than the key fob)
The plastic moulding and magnets do not appear to have much effect on the tuning of the antenna
The antenna Q = 76 seems quite high (but this is damped by series resistors, so it is probably acceptable).
The antenna matching circuit closely follows the development board, which is optimised for an antenna with 929 nH inductance and a Q of 35 (except for the parallel capacitance and series damping resistance).
The online calculator tool recommends slightly different values for this antenna based on the characterisation:
Higher parallel capacitance (84 pF instead of 56 pF)
Lower series resistance (3.1 Ω instead of 5.6 Ω)
However, tuning is probably not a major issue, as the Q has effectively been forced to be low.
Using the tool to confirm, 5.6 Ω corresponds to a target Q of 10, which is somewhat low. A value of 3.3 Ω may have been more appropriate.
The boards have not been powered up to confirm the suitability of the receiver divider capacitors. Ideally, a 2.7 V signal should be received. This would be a useful test.
RF Design & Testing
Project 906
